Search - dsp fpga

[DSP program] FftDisplay

Description: 基于DSP和FPGA的专业级音频处理开发板的源代码（更改版），在开发板上测试通过。-DSP and FPGA-based professional-grade audio processing development board
Platform: | Size: 205824 | Author: 王旭 | Hits:

Description: 介绍了被动雷达探测系统测向方法,提出了被动测向系统信号处理器的设计方法. 采用DSP(数字信号处理器) + FPGA(现场可编程门阵列) 结构,使得系统的处理速度大大提高,而且集成度高、可靠性好、使用灵活,具有很强的应用价值和参考价值.-Introduction of the passive radar detection system to test methods of measuring the passive signal processor to the system design method. The use of DSP (digital signal processor)+ FPGA (field programmable gate array) structure, making the system processing speed greatly enhanced, and high integration, reliability, and the use of flexible, has a strong value and reference value.
Platform: | Size: 165888 | Author: 王功臣 | Hits:

[VHDL-FPGA-Verilog] fpgafft

Description: 用fpga实现dsp 的fft算法其中有几个文档文件和用vhdl写的1024点的fft代码-FPGA dsp realize using the fft algorithm which has a number of document files and the use of VHDL to write the 1024 point fft code
Platform: | Size: 533504 | Author: 阿斯顿 | Hits:

[matlab] Application_in_FPGA_design_of_Matlab_simulink

Description: 分析了MATLAB/Simulink 中DSP Builder 模块库在FPGA 设计中优点，然后结合FSK 信号的产生原理，给出了如何利用DSP Builder 模块库建立FSK 信号发生器模型，以及对FSK 信号发生器模型进行算法级仿真和生成VHDL 语言的方法，并在modelsim 中对FSK 信号发生器进行RTL 级仿真，最后介绍了在FPGA 芯片中实现FSK 信号发生器的设计方法。-Analysis of the MATLAB/Simulink in DSP Builder Blockset in the FPGA design advantages, and then combined with the emergence of the principle of FSK signal is given how to use DSP Builder Blockset establish FSK signal generator model, as well as the FSK signal generator model algorithm class VHDL simulation and generation language approach, and in ModelSim for FSK signal generator for RTL-level simulation, and finally introduce the FPGA chip realize FSK signal generator design method.
Platform: | Size: 275456 | Author: 普林斯 | Hits:

[VHDL-FPGA-Verilog] DUC

Description: 数字上变频DUC是与数字下变频ddc相对应的工作.目前实现方式主要有:专用芯片,通用DSP和FPGA实现三种.本程序即给出了XILINX公司的Digital Up Converter核心程序(IP CORE)以及响应的使用说明,对于从事雷达,无线通信的工程人员和研究者有很大用处.-DUC is a digital up-conversion and digital down conversion that corresponds to the work of ddc. Realize the current approach are: ASIC, DSP and FPGA generic realize three. This procedure is given that the company XILINX core Digital Up Converter program (IP CORE) and to respond to instructions, for radar, wireless communications, engineers and researchers have great usefulness.
Platform: | Size: 305152 | Author: 周严 | Hits:

[DSP program] TI_DSP

Description: TI DSP最小系统原理图，是protel文档，直接可运用，相当好-TI DSP minimum system schematic is Protel documents, can be used directly, quite good
Platform: | Size: 23552 | Author: yxh | Hits:

[Software Engineering] MAXII_application_handbook(chinese)

Description: MAX II CPLD具有灵活的可编程接口，合并了分立的FLASH存储器件，能快速和容易地配置FPGA，DSP，ASIC等。本中文手册将让用户对CPLD有一个宏观的认识。-MAX II CPLD with a flexible programmable interface, the merger of the separation of FLASH memory, can quickly and easily configure the FPGA, DSP, ASIC, etc.. Chinese manual will allow users to have a macro on the CPLD awareness.
Platform: | Size: 990208 | Author: pantree | Hits:

[Other] ICETEK-VC5509-C

Description: ICETEK_VC5509_C的硬件原理图，泰瑞公司开发的针对TI C5509A DSP的评估版。包含xilinx FPGA 及语音解码芯片TLV320AIC23等的连接，可借鉴性强 -ICETEK_VC5509_C hardware schematics, Terry developed for the TI C5509A DSP evaluation version. Contains xilinx FPGA and voice decoder chip TLV320AIC23 connections, etc., can draw on strong
Platform: | Size: 66560 | Author: 一凡 | Hits:

[VHDL-FPGA-Verilog] FFTuseFPGA1

Description: FFT算法的一种基于FPGA器件的实现，供FPGA—DSP方向人员参考-FFT algorithm based on the realization of FPGA devices for FPGA-DSP reference direction
Platform: | Size: 312320 | Author: enhom | Hits:

[DSP program] test

Description: DSP与FPGA的简单通信程序，已经成功调试，根据自己的硬件设计相应简单修改就可以使用-DSP and FPGA simple communication program, have successfully debug hardware design according to their corresponding simple modification you can use
Platform: | Size: 9216 | Author: 陈剑 | Hits:

[VHDL-FPGA-Verilog] DSP_design_based_on_FPGA

Description: 用FPGA设计DSP,2007年上海FPGA高级研修班清华博士贺光辉讲义-FPGA Design with DSP, 2007 in Shanghai FPGA advanced training classes Tsinghua notes Dr. He Guanghui
Platform: | Size: 1352704 | Author: david | Hits:

[DSP program] fpga_realtime

Description: ＤＳＰ——ＦＰＧＡ实时信号处理系统的实现说明-DSP- FPGA real-time signal processing system that
Platform: | Size: 24576 | Author: fiann | Hits:

[DSP program] my_own_OSD

Description: 自己编写的,采用DSP实现字符叠加的程序,基于合众达SEED-DEC643的扳子,CCS2.2环境,原来的例程是采用FPGA实现字符叠加的,改程序完全采用DSP进行叠加.-I have written using DSP realization of characters superimposed on the procedure, based on the union of the SEED-DEC643 Tatsu wrench, CCS2.2 environment, the original routine are superimposed FPGA realization of characters, changing the procedures to carry out completely the use of DSP superposition.
Platform: | Size: 346112 | Author: 高浩然 | Hits:

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[DSP program] FftDisplay

[DSP program] 3

[VHDL-FPGA-Verilog] fpgafft

[matlab] Application_in_FPGA_design_of_Matlab_simulink

[VHDL-FPGA-Verilog] DUC

[DSP program] TI_DSP

[Software Engineering] MAXII_application_handbook(chinese)

[Other] ICETEK-VC5509-C

[VHDL-FPGA-Verilog] FFTuseFPGA1

[DSP program] test

[VHDL-FPGA-Verilog] DSP_design_based_on_FPGA

[DSP program] fpga_realtime

[DSP program] my_own_OSD

[VHDL-FPGA-Verilog] write_io

[VHDL-FPGA-Verilog] write_rd

[Software Engineering] Cyclone_II_EP2C35_DSP

[VHDL-FPGA-Verilog] 1569154643

[VHDL-FPGA-Verilog] 16bitFFTFPGA

[VHDL-FPGA-Verilog] FIFO_EMIF

[VHDL-FPGA-Verilog] QAM

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